kw.\*:("Circuito analógico")
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A single D-FET 4-QAM with SC technologyZHANGMIAO ZHANG; XUESI DONG; ZHIJIAN ZHANG et al.IEEE transactions on circuits and systems. 1988, Vol 35, Num 12, pp 1551-1552, issn 0098-4094Article
Technique for compensation of errors in analogue multipliersCICHOCKI, A; UNBEHAUEN, R.Electronics Letters. 1989, Vol 25, Num 5, pp 305-307, issn 0013-5194, 3 p.Article
Universal hybrid-pi model qualifies as potential COMPACT MODEL for Analog circuit simulationSHARMA, Bijay K.SPIE proceedings series. 2002, pp 707-712, isbn 0-8194-4500-2, 2VolConference Paper
A Tellegen's theorem approach to the fault diagnosis of general analog circuitsAL-SHANUTI, S. I; RUSHDI, A. M.Microelectronics and reliability. 1987, Vol 27, Num 2, pp 283-297, issn 0026-2714Article
Fundamentals of the analog computer : Circuits, technology, and simulation : The history of analog computingHOWE, Robert M.IEEE control systems. 2005, Vol 25, Num 3, pp 29-36, issn 1066-033X, 8 p.Article
A prototype tool for the design-oriented symbolic analysis of analogue circuitsDOREL, F; DECLERCQ, M.International journal of circuit theory and applications. 1992, Vol 20, Num 3, pp 257-266, issn 0098-9886Article
Comments on Fault prediction for analog circuits . Reply. Further commentsPRASAD, V. C; RAO PINJALA, S. N; BEN-LU JIANG et al.Circuits, systems, and signal processing. 1990, Vol 9, Num 4, pp 501-505, issn 0278-081XArticle
Symbolic approximation of circuit response containing negative termsMARKOSKI, I. M; TOSIC, D. V.International conference on microelectronic. 1997, pp 705-708, isbn 0-7803-3664-X, 2VolConference Paper
A fast, single-layer, area router for semi-custom analogue circuitsBUSET, O; DECLERCQ, M; FOUAD RAHALI et al.International journal of circuit theory and applications. 1992, Vol 20, Num 3, pp 283-298, issn 0098-9886Article
Discrete-time state estimation of analog double integratorsSHATS, S; BOBROVSKY, B. Z; SHAKED, U et al.IEEE transactions on aerospace and electronic systems. 1988, Vol 24, Num 6, pp 670-677, issn 0018-9251Article
Cryogenic operation of FinFETs aiming at analog applicationsPAVANELLO, M. A; MARTINO, J. A; SIMOEN, E et al.Cryogenics (Guildford). 2009, Vol 49, Num 11, pp 590-594, issn 0011-2275, 5 p.Conference Paper
A simple analog interface circuit for recording fast repetitive waveforms on an x-yrecorderLAKSHMINARAYANAN, V; POOJARY, A; RAJAGOPALAN, S. R et al.Indian journal of technology. 1991, Vol 29, Num 10, pp 498-502, issn 0019-5669Article
A four quadrant multiplier with independent control of range and sensitivityPATRANABIS, D; GHOSH, D.IEEE transactions on instrumentation and measurement. 1989, Vol 38, Num 1, pp 17-21, issn 0018-9456, 5 p.Article
New four-quadrant CMOS analogue multiplierKIM, C. W; PARK, S. B.Electronics Letters. 1987, Vol 23, Num 24, pp 1268-1270, issn 0013-5194Article
A CMOS four-quadrant analog multiplierBULT, K; WALLINGA, H.IEEE journal of solid-state circuits. 1986, Vol 21, Num 3, pp 430-435, issn 0018-9200Article
The TF-equivalence class approach to analog fault diagnosis problemsTOGAWA, Y; MATSUMOTO, T; ARAI, H et al.IEEE transactions on circuits and systems. 1986, Vol 33, Num 10, pp 992-1009, issn 0098-4094Article
Filtrage fréquentiel d'un signal par les blocs d'entrée de dispositifs à couplage par chargeVINETSKIJ, YU. R.Radiotehnika i èlektronika. 1986, Vol 31, Num 12, pp 2475-2482, issn 0033-8494Article
Intuitive analogue circuit designTOUMAZOU, C; BARRY, G.Electronics & communication engineering journal. 1997, Vol 9, Num 5, pp 231-239, issn 0954-0695Article
Correlation-based comparison of analog signatures for identification and fault diagnosisPAPAKOSTAS, D. K; HATZOPOULOS, A. A.IEEE transactions on instrumentation and measurement. 1993, Vol 42, Num 4, pp 860-863, issn 0018-9456Article
Curvature-corrected low-noise sub-bandgap reference in 28 nm CMOS technologyBOWERS, D. F; MODICA, E. J.Electronics letters. 2014, Vol 50, Num 5, pp 396-398, issn 0013-5194, 3 p.Article
Is a New Paradigm for Nanoscale Analog CMOS Design Needed?LEWYN, Lanny; WILLIAMS, Nicolas.Proceedings of the IEEE. 2011, Vol 99, Num 1, pp 3-6, issn 0018-9219, 4 p.Article
An approach to analog fault diagnosis using genetic algorithmsGRASSO, F; MANETTI, S; PICCIRILLI, M. C et al.Mediterranean electrotechnical conference. 2004, isbn 0-7803-8271-4, 3Vol, Vol.1, 111-114Conference Paper
Analog at milepost 2000: A personal perspectiveGILBERT, Barrie.Proceedings of the IEEE. 2001, Vol 89, Num 3, pp 289-304, issn 0018-9219Article
Techniques de Test pour Circuits à Courants Commutés = Test Techniques for Switched-Current CircuitsBodin, Jean-Charles; Bertrand, Yves.1999, 159 p.Thesis
Fast algorithms for selection of test nodes of an analog circuit using a generalized fault dictionary approachPRASAD, V. C; RAO PINJALA, S. N.Circuits, systems, and signal processing. 1995, Vol 14, Num 6, pp 707-724, issn 0278-081XArticle